Re: POKE and STA for speaker access |
Author: Vladimir Ivanov Date: 31 Jul 2014 7:05 pm Ref: 1 2 3 4 5 |
> From the Bill Mensch interview it looks like they didn't know about the
> RWTS/disk controller problem until they tried to develop the 65C816.
I somehow doubt this is pure luck, but not losing much sleep over it,
either. :-)
>>> STA (zp),Y has been fixed for both cases by adding a dummy read of the
>>> program counter, so the change was rW -> W and RW -> W.
>>
>> Just a small correction - as I wrote previously, it does dummy read of
>> zero page. :-)
>
> Yes, but that is an extra read of an operand (zp + 1), which can be
> considered "expected". The operand is read. We don't care how many
> times. ; - )It doesn't access anywhere "unexpected" like it did in the
> NMOS 6502. The extra access used to be to the destination (or dest
> -$100) where we do care how many times.
That feature of the NMOS 6502 was a neat trick for C64 people. Otherwise
plenty dangerous near I/O areas in various embedded 6502 setups, so Mr.
Mensch did the right thing and got rid of it.
>> Yes, $DE/$FE don't save a cycle on no page boundary crossing, but there is
>> still a twist - the dummy read is different depending on whether or not
>> page boundary is crossed. I guess another Apple II compatibility patch,
>> maybe.
>
> Interesting. Do you have a link for this?
My own inspection of G65SC02P.
> The 6502.org site mentions it, but there's no detailed cycle timing. I
> would be surprised if INC/DEC abs,X did an "unexpected" read - I mean to
> dest - $100.
No, 65SC02 does not do dangerous "semi" indexed reads at all, that's the
beauty of it.
The no page boundary crossing case of $DE/$FE does quadruple access to the
target address (RRRW), while the page boundary case does only triple
access (RRW).